Method and structure for FinFET comprising patterned oxide and dielectric layer under spacer features

Method and structure for FinFET comprising patterned oxide and dielectric layer under spacer features

A semiconductor device includes a fin projecting upwardly from a substrate; a gate stack engaging the fin; a gate spacer on a sidewall of the gate stack and in contact with the gate stack; and a dielectric layer on the sidewall of the gate stack and in contact with the gate stack, the dielectric lay...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Chang, Che-Cheng, Lin, Jr-Jung, Chen, Shih-Hao, Lin, Chih-Han, Chang, Yung Jung, Lin, Mu-Tsang
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A semiconductor device includes a fin projecting upwardly from a substrate; a gate stack engaging the fin; a gate spacer on a sidewall of the gate stack and in contact with the gate stack; and a dielectric layer on the sidewall of the gate stack and in contact with the gate stack, the dielectric layer being vertically between the fin and the gate spacer, wherein the dielectric layer has a thickness small than the gate spacer.