Low-latency, high-availability and high-speed SerDes interface having multiple synchronization modes

A computer-implemented method includes using a transmitter to send data from the transmitter through a plurality of lanes to a receiver using a synchronous operation mode that includes sending the data from the transmitter through the plurality of lanes to the receiver in a synchronous transmission...

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Bibliographische Detailangaben
Hauptverfasser: Jacobi, Christian, Friedman, Logan Ian, Gilda, Glenn David, Leenstra, Jentje, Thompson, Jason Andrew, Ganfield, Paul Allen, Kleppel, Yvonne Hanson, Meaney, Patrick James, Mishra, Ashutosh
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A computer-implemented method includes using a transmitter to send data from the transmitter through a plurality of lanes to a receiver using a synchronous operation mode that includes sending the data from the transmitter through the plurality of lanes to the receiver in a synchronous transmission manner that relies on an alignment between a transmitter clock frequency and a receiver clock frequency. A synchronous operation performance analysis (SOPA) is performed during the synchronous operation mode. A switch from the synchronous operation mode to an asynchronous operation mode is made based on a result of performing the SOPA. The asynchronous operation mode includes sending the data from the transmitter through the plurality of lanes to the receiver without requiring alignment between the transmitter clock frequency and the receiver clock frequency.