Implementing variable number of bits per cell on storage devices

Systems and methods are disclosed including a memory component and a processing device, coupled to the memory component. The processing device can program a block of the memory component using a first type of memory cells storing a first number of bits per memory cell. The processing device can then determine that an amount of memory used of the memory component is greater than a capacity threshold. Responsive to determining that a frequency of access to the block meets a criterion, the processing device can then program the block using a second type memory cells storing a second number of bits per memory cell, wherein the second number of bits exceeds the first number of bits.