Semiconductor package

A semiconductor package includes a redistribution substrate including a first redistribution layer; a semiconductor chip having a connection pad connected to the first redistribution layer; a vertical connection conductor electrically connected to the connection pad by the first redistribution layer; a core member having a first through-hole accommodating the semiconductor chip and a second through-hole accommodating the vertical connection conductor; an encapsulant filling the first and second through-holes; and a redistribution member including a second redistribution layer. The vertical connection conductor and the core member include a same material. A width of a lower surface of the vertical connection conductor is wider than that of an upper surface thereof, a width of a lower end of the first through-hole is narrower than that of an upper end thereof, and a width of a lower end of the second through-hole is narrower than that of an upper end thereof.