Packetized power-on-self-test controller for built-in self-test

Packetized power-on-self-test controller for built-in self-test

Techniques for testing an integrated circuit (IC) are disclosed. A controller in the IC retrieves first testing data from a first memory in the IC. The controller transmits the first testing data to a first built-in self-test (BIST) core. The controller receives a response from the first BIST core,...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Purohit, Amit Gopal M, Kolisetti, Ramalingam, Sinha, Anubhav, Talluto, Salvatore, Marru, Sai Manish Rao, Soni, Sahil
Format: Patent
Sprache:eng
Schlagworte:
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Beschreibung
Zusammenfassung:Techniques for testing an integrated circuit (IC) are disclosed. A controller in the IC retrieves first testing data from a first memory in the IC. The controller transmits the first testing data to a first built-in self-test (BIST) core. The controller receives a response from the first BIST core, relating to a test at the first BIST core using the first testing data. The controller determines a status of the test relating to the IC based on the response.