Memory system and electronic system including the same

A memory system includes a memory controller configured to control an operation of a memory cell array through a first command/address pin and a second other command/address pin and a memory device. The memory device includes a plurality of data pins configured to exchange data input with the memory cell array according to a command/address provided through the first and second command/address pins to the memory controller, a first flip-flop to sample a first command/address signal provided through the first command/address pin as first command/address data at a first time, and a second flip-flop to sample a second command/address signal provided through the second command/address pin as second command/address data at the first time. The memory device provides the first and second command/address data to the memory controller through a first data pin among the plurality of data pins.