Adjustable phase shifter

A method includes determining a phase error for a first clock signal and a second clock signal and determining an offset based on the phase error for the first clock signal and the second clock signal. The method also includes adding the offset to a phase of the first clock signal to produce a first...

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Bibliographische Detailangaben
Hauptverfasser:	Marquart, Chad Andrew, Dreps, Daniel M, You, Yang, Wiedemeier, Glen A, Bohlke, Tyler
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS PHYSICS RESONATORS
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Beschreibung
Zusammenfassung:	A method includes determining a phase error for a first clock signal and a second clock signal and determining an offset based on the phase error for the first clock signal and the second clock signal. The method also includes adding the offset to a phase of the first clock signal to produce a first adjusted clock signal and subtracting the offset from a phase of the second clock signal to produce a second adjusted clock signal. A phase error for the first adjusted clock signal and the second adjusted clock signal is smaller than the phase error for the first clock signal and the second clock signal.