Package structure and fabrication methods
The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereaft...
Gespeichert in:
| Hauptverfasser: | , , , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | Chen, Han-Wen Verhaverbeke, Steven Park, Giback Tonini, Diego Cho, Kyuil Cellere, Giorgio Dicaprio, Vincent |
| description | The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11521935B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11521935B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11521935B23</originalsourceid><addsrcrecordid>eNrjZNAMSEzOTkxPVSguKSpNLiktSlVIzEtRSEtMKspMTizJzM9TyE0tychPKeZhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfGhwYaGpkaGlsamTkbGxKgBABYNKQA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Package structure and fabrication methods</title><source>esp@cenet</source><creator>Chen, Han-Wen ; Verhaverbeke, Steven ; Park, Giback ; Tonini, Diego ; Cho, Kyuil ; Cellere, Giorgio ; Dicaprio, Vincent</creator><creatorcontrib>Chen, Han-Wen ; Verhaverbeke, Steven ; Park, Giback ; Tonini, Diego ; Cho, Kyuil ; Cellere, Giorgio ; Dicaprio, Vincent</creatorcontrib><description>The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.</description><language>eng</language><subject>ANTENNAS, i.e. RADIO AERIALS ; BASIC ELECTRIC ELEMENTS ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20221206&DB=EPODOC&CC=US&NR=11521935B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20221206&DB=EPODOC&CC=US&NR=11521935B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Chen, Han-Wen</creatorcontrib><creatorcontrib>Verhaverbeke, Steven</creatorcontrib><creatorcontrib>Park, Giback</creatorcontrib><creatorcontrib>Tonini, Diego</creatorcontrib><creatorcontrib>Cho, Kyuil</creatorcontrib><creatorcontrib>Cellere, Giorgio</creatorcontrib><creatorcontrib>Dicaprio, Vincent</creatorcontrib><title>Package structure and fabrication methods</title><description>The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.</description><subject>ANTENNAS, i.e. RADIO AERIALS</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNAMSEzOTkxPVSguKSpNLiktSlVIzEtRSEtMKspMTizJzM9TyE0tychPKeZhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfGhwYaGpkaGlsamTkbGxKgBABYNKQA</recordid><startdate>20221206</startdate><enddate>20221206</enddate><creator>Chen, Han-Wen</creator><creator>Verhaverbeke, Steven</creator><creator>Park, Giback</creator><creator>Tonini, Diego</creator><creator>Cho, Kyuil</creator><creator>Cellere, Giorgio</creator><creator>Dicaprio, Vincent</creator><scope>EVB</scope></search><sort><creationdate>20221206</creationdate><title>Package structure and fabrication methods</title><author>Chen, Han-Wen ; Verhaverbeke, Steven ; Park, Giback ; Tonini, Diego ; Cho, Kyuil ; Cellere, Giorgio ; Dicaprio, Vincent</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11521935B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>ANTENNAS, i.e. RADIO AERIALS</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Chen, Han-Wen</creatorcontrib><creatorcontrib>Verhaverbeke, Steven</creatorcontrib><creatorcontrib>Park, Giback</creatorcontrib><creatorcontrib>Tonini, Diego</creatorcontrib><creatorcontrib>Cho, Kyuil</creatorcontrib><creatorcontrib>Cellere, Giorgio</creatorcontrib><creatorcontrib>Dicaprio, Vincent</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chen, Han-Wen</au><au>Verhaverbeke, Steven</au><au>Park, Giback</au><au>Tonini, Diego</au><au>Cho, Kyuil</au><au>Cellere, Giorgio</au><au>Dicaprio, Vincent</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Package structure and fabrication methods</title><date>2022-12-06</date><risdate>2022</risdate><abstract>The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US11521935B2 |
| source | esp@cenet |
| subjects | ANTENNAS, i.e. RADIO AERIALS BASIC ELECTRIC ELEMENTS CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS SEMICONDUCTOR DEVICES |
| title | Package structure and fabrication methods |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-09T02%3A13%3A01IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Chen,%20Han-Wen&rft.date=2022-12-06&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11521935B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |