Semiconductor layout pattern and forming method thereof

Semiconductor layout pattern and forming method thereof

The invention provides a semiconductor layout pattern, the semiconductor layout pattern includes a substrate, a plurality of ternary content addressable memories (TCAM) are arranged on the substrate, the layout of at least two TCAM is mirror symmetric with each other along an axis of symmetry, and t...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Kuo, Yu-Tse, Yu, Hsin-Chih, Huang, Li-Ping, Wang, Shu-Ru, Tseng, Chun-Yen, Huang, Chun-Hsien, Chuang, Meng-Ping
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
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Beschreibung
Zusammenfassung:The invention provides a semiconductor layout pattern, the semiconductor layout pattern includes a substrate, a plurality of ternary content addressable memories (TCAM) are arranged on the substrate, the layout of at least two TCAM is mirror symmetric with each other along an axis of symmetry, and the two TCAM are connected to the same search line (SL) together.