Vehicle control device

In the present invention, when an abnormality occurs in a task, regardless of whether a critical section is being executed, timeout detection is realized by determining whether the critical section (CS) is necessary for the design in a preset task execution time and a certain period of time to disti...

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Bibliographische Detailangaben
Hauptverfasser:	Serizawa, Kazuyoshi, Tsukidate, Tsunamichi, Ebina, Tomohito, Ishigooka, Tasuku
Format:	Patent
Sprache:	eng
Schlagworte:	BLASTING CALCULATING COMBUSTION ENGINES COMPUTING CONJOINT CONTROL OF VEHICLE SUB-UNITS OF DIFFERENT TYPE ORDIFFERENT FUNCTION CONTROL SYSTEMS SPECIALLY ADAPTED FOR HYBRID VEHICLES CONTROLLING CONTROLLING COMBUSTION ENGINES COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY HEATING HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS LIGHTING MECHANICAL ENGINEERING PERFORMING OPERATIONS PHYSICS REGULATING ROAD VEHICLE DRIVE CONTROL SYSTEMS FOR PURPOSES NOT RELATED TOTHE CONTROL OF A PARTICULAR SUB-UNIT SYSTEMS FOR CONTROLLING OR REGULATING NON-ELECTRIC VARIABLES TRANSPORTING VEHICLES IN GENERAL VEHICLES, VEHICLE FITTINGS, OR VEHICLE PARTS, NOT OTHERWISEPROVIDED FOR WEAPONS WIRELESS COMMUNICATIONS NETWORKS
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Beschreibung
Zusammenfassung:	In the present invention, when an abnormality occurs in a task, regardless of whether a critical section is being executed, timeout detection is realized by determining whether the critical section (CS) is necessary for the design in a preset task execution time and a certain period of time to distinguish between necessary interrupt disable and abnormal interrupt disable. A vehicle control device includes task execution means for causing a system to execute a task, and interrupt processing means for performing an interrupt process at the time of execution of the task. A maskable interrupt and a non-maskable interrupt that is commanded to execute after the maskable interrupt are included, the maskable interrupt is commanded to execute during an interrupt disable time, and then the non-maskable interrupt is executed.