Sublithography gate cut physical unclonable function

Methods, and devices related to authentication of chips using physical unclonable function (PUF) are disclosed. The semiconductor chip includes a substrate. The semiconductor chip includes multiple devices formed on the substrate. Each device includes multiple fins. A gate is formed on the multiple...

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Bibliographische Detailangaben
Hauptverfasser:	Karve, Gauri, Lie, Fee Li, Bergendahl, Marc A, Miller, Eric, Cheng, Kangguo, Sporre, John Ryan
Format:	Patent
Sprache:	eng
Schlagworte:	APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS BASIC ELECTRIC ELEMENTS CONTROL OR REGULATION THEREOF CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY GENERATION MANUFACTURE OR TREATMENT OF NANOSTRUCTURES MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES NANOTECHNOLOGY PERFORMING OPERATIONS SEMICONDUCTOR DEVICES SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION TRANSPORTING
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Beschreibung
Zusammenfassung:	Methods, and devices related to authentication of chips using physical unclonable function (PUF) are disclosed. The semiconductor chip includes a substrate. The semiconductor chip includes multiple devices formed on the substrate. Each device includes multiple fins. A gate is formed on the multiple fins with a gate cut (CT) design that results in random distribution of complete gate cut and incomplete gate cut for each of the multiple devices based on a natural process variation in semiconductor manufacturing for each device. A physical unclonable function (PUF) region is defined in accordance with the random distribution.