Tracking analog-to-digital converter for power converters

A tracking analog-to-digital converter (ADC) for a power converter includes a first tracking loop and a second tracking loop. The first tracking loop is configured to track a voltage input to the tracking ADC using one or more comparators and has a re-clocking circuit to mitigate the impact of comparator output metastability, but introduces multi-cycle latency which increases a residual error of the voltage tracking provided by the first tracking loop. The second tracking loop is configured to supplement the voltage tracking provided by the first tracking loop and to reduce the residual error of the voltage tracking for dynamic changes at the voltage input. The second tracking loop has a single-cycle latency and is implemented with logic that is less sensitive to logic errors due to comparator metastability. Corresponding methods of voltage tracking and an electronic system are also described.