Wafer-level passive array packaging

Wafer level passive array packages and modules are described. In an embodiment, a module includes a circuit board, and a package mounted on the circuit board in which the package includes a plurality of passive components bonded to a bottom side of the die and a plurality of landing pads of the circ...

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Bibliographische Detailangaben
Hauptverfasser: Shanmugam, Karthik, Camenforte, Raymundo M, Carson, Flynn P, Agrawal, Rakshit, Morrison, Scott D, Dhaliwal, Kiranjit
Format: Patent
Sprache:eng
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Zusammenfassung:Wafer level passive array packages and modules are described. In an embodiment, a module includes a circuit board, and a package mounted on the circuit board in which the package includes a plurality of passive components bonded to a bottom side of the die and a plurality of landing pads of the circuit board.