Drive control circuit, drive control chip, integrated packaged device, display system, and sparse drive method

The present disclosure describes a drive control circuit, a drive control chip, an integrated packaged device, a display system, and a sparse drive method. The drive control circuit includes a data input end, a clock input end, a decoding and control unit, a decoding and gating unit, at least two drive sources, and at least two drive signal output ends. A first input end of the decoding and control unit is electrically connected to the data input end, a second input end is electrically connected to the clock input end, a control input end is electrically connected to a control output end, an address input end is electrically connected to an address output end.