Memory arrays

A memory array comprises vertically-alternating tiers of insulative material and memory cells. The memory cells individually comprise a transistor and a capacitor. One of (a) a channel region of the transistor, or (b) a pair of electrodes of the capacitor, is directly above the other of (a) and (b)....

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Tang, Sanh D, Roberts, Martin C
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A memory array comprises vertically-alternating tiers of insulative material and memory cells. The memory cells individually comprise a transistor and a capacitor. One of (a) a channel region of the transistor, or (b) a pair of electrodes of the capacitor, is directly above the other of (a) and (b). Additional embodiments and aspects are disclosed.