Method, system and apparatus for constant, high switching frequency and narrow duty ratio PWM control of DC-DC converters and accurate PFM control at light load

DC-DC power converter control comprises current starved delay lines for phase shifting control signals that set and reset a RS flip-flop to provide controllable PWM pulse widths from narrow to wide at a clock frequency. Precise pulse width control and a guaranteed minimum pulse width for pulse frequency modulation (PFM) control the DC-DC power converter during low power demand is also provided. PFM control maintains the same pulse width while decreasing the number of pulses per second when the output voltage exceeds an upper value and increases the number of pulses per second when the output voltage is less than a lower value. Voltage-to-current converters provide control currents to the current starved delay lines that provide the control signals to the SET and RESET inputs of the RS flip-flop. A D-flip-flop may further be used to improved circuit operation when generating high duty cycle (>50 percent) pulse widths.