Adaptive voltage scaling methods and systems therefor

The present techniques disclose a logic gate for an adaptive voltage scaling monitor, the logic gate comprising an inverting output and further comprising an imbalance between the drive strength of an NMOS component and a PMOS component thereof, and wherein the imbalance is operable to cause a switc...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: Herberholz, Rainer
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:The present techniques disclose a logic gate for an adaptive voltage scaling monitor, the logic gate comprising an inverting output and further comprising an imbalance between the drive strength of an NMOS component and a PMOS component thereof, and wherein the imbalance is operable to cause a switching delay of the gate to be primarily dependent on one of the NMOS component or the PMOS component.