Multiple dies hardware processors and methods

Multiple dies hardware processors and methods

Methods and apparatuses relating to hardware processors with multiple interconnected dies are described. In one embodiment, a hardware processor includes a plurality of physically separate dies, and an interconnect to electrically couple the plurality of physically separate dies together. In another...

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Bibliographische Detailangaben
Hauptverfasser: Singh, Tejpal, Chamberlain, Jeffrey D, Sistla, Krishnakanth V, Kumashikar, Mahesh K, Geetha, Vedaraman, Ayers, John R, Pasdast, Gerald, Nassif, Nevine, Eachempati, Siva Soumya, Nimmagadda, Srikanth, Halleck, William R, Subbareddy, Dheeraj R, Liu, Yen-Cheng, Varma, Ankush, Chrysos, George Z, Molnar, Carleton L
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:Methods and apparatuses relating to hardware processors with multiple interconnected dies are described. In one embodiment, a hardware processor includes a plurality of physically separate dies, and an interconnect to electrically couple the plurality of physically separate dies together. In another embodiment, a method to create a hardware processor includes providing a plurality of physically separate dies, and electrically coupling the plurality of physically separate dies together with an interconnect.