Semiconductor memory device

Disclosed is a semiconductor memory device including a stack structure including layers which are vertically stacked on a substrate and each of which includes a bit line extending in a first direction and a semiconductor pattern extending in a second direction from the bit line, a gate electrode which is in a hole penetrating the stack structure and extending along a stack of semiconductor patterns, a vertical insulating layer covering the gate electrode and filling the hole, and a data storage element electrically connected to the semiconductor pattern. The data storage element includes a first electrode, which is in a first recess of the vertical insulating layer and has a cylindrical shape whose one end is opened, and a second electrode, which includes a first protrusion in a cylinder of the first electrode and a second protrusion in a second recess of the vertical insulating layer.