Semiconductor memory device

According to one embodiment, a semiconductor memory device includes: first and second interconnect layers; a plurality of third interconnect layers stacked between the first and second interconnect layers; a first insulating layer passing through the plurality of third interconnect layers, and inclu...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser:	Yoshimizu, Yasuhito
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE PHYSICS SEMICONDUCTOR DEVICES STATIC STORES
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Beschreibung
Zusammenfassung:	According to one embodiment, a semiconductor memory device includes: first and second interconnect layers; a plurality of third interconnect layers stacked between the first and second interconnect layers; a first insulating layer passing through the plurality of third interconnect layers, and including one end that is in contact with a first face of the first interconnect layer; a first memory pillar including a first semiconductor layer passing through the plurality of third interconnect layers and a charge storage layer provided between the plurality of third interconnect layers and the first semiconductor layer. A distance between a third face of the first interconnect layer opposite to the first face and the second interconnect layer in the first direction, differs at a position corresponding to the first insulating layer from at positions corresponding to the third interconnect layers.