Semiconductor memory having reduced interference between bit lines and word lines
A flash memory device includes a substrate, a plurality of active regions and a plurality of first isolation regions alternately arranged in a first direction and extending in a second direction different from the first direction, a plurality of gate structures on the substrate, the gate structures...
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| Sprache: | eng |
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| Zusammenfassung: | A flash memory device includes a substrate, a plurality of active regions and a plurality of first isolation regions alternately arranged in a first direction and extending in a second direction different from the first direction, a plurality of gate structures on the substrate, the gate structures being spaced apart from each other and extending in the second direction, a gap structure between the gate structures, and a second isolation region filling an upper portion of the gap structure and leaving a first air gap in a lower portion of the gap structure. |
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