Double patterning method

The present disclosure, in some embodiments, relates to a method of forming an integrated circuit. The method includes forming a first hard mask layer over a substrate and forming a second hard mask layer over the first hard mask layer. The second hard mask layer is patterned to define an island hav...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Lee, Chia-Ying, Shieh, Jyu-Horng
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:The present disclosure, in some embodiments, relates to a method of forming an integrated circuit. The method includes forming a first hard mask layer over a substrate and forming a second hard mask layer over the first hard mask layer. The second hard mask layer is patterned to define an island having a first width along a first direction. The island is patterned to form a patterned island having a second width along the first direction that is less than the first width. A sacrificial mask is formed over the first hard mask layer and the first hard mask layer is patterned according to the patterned island and the sacrificial mask.