Modular WLCSP die daisy chain design for multiple die sizes

A method to fabricate a modular die daisy chain design for wafer level chip scale package (WLCSP) board level reliability testing is described. A wafer is provided having pairs of solder balls electrically connected to each other by underlying metal pads. The wafer is singulated into dies of any of...

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Hauptverfasser: Barclay, Duncan, Horsburgh, Edward, Belonio, Jr., Jesus Mennen
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creator Barclay, Duncan
Horsburgh, Edward
Belonio, Jr., Jesus Mennen
description A method to fabricate a modular die daisy chain design for wafer level chip scale package (WLCSP) board level reliability testing is described. A wafer is provided having pairs of solder balls electrically connected to each other by underlying metal pads. The wafer is singulated into dies of any of a plurality of sizes as required for testing. Thereafter one of the singulated dies is mounted to a test printed circuit board (PCB). The pairs of solder balls are electrically connected in a daisy chain on the test PCB.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11158551B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11158551B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11158551B23</originalsourceid><addsrcrecordid>eNrjZLD2zU8pzUksUgj3cQ4OUEjJTFVIScwsrlRIzkjMzFNISS3OTM9TSMsvUsgtzSnJLMhJBaspzqxKLeZhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfGhwYaGhqYWpqaGTkbGxKgBADiaLqU</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Modular WLCSP die daisy chain design for multiple die sizes</title><source>esp@cenet</source><creator>Barclay, Duncan ; Horsburgh, Edward ; Belonio, Jr., Jesus Mennen</creator><creatorcontrib>Barclay, Duncan ; Horsburgh, Edward ; Belonio, Jr., Jesus Mennen</creatorcontrib><description>A method to fabricate a modular die daisy chain design for wafer level chip scale package (WLCSP) board level reliability testing is described. A wafer is provided having pairs of solder balls electrically connected to each other by underlying metal pads. The wafer is singulated into dies of any of a plurality of sizes as required for testing. Thereafter one of the singulated dies is mounted to a test printed circuit board (PCB). The pairs of solder balls are electrically connected in a daisy chain on the test PCB.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS ; SEMICONDUCTOR DEVICES</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20211026&amp;DB=EPODOC&amp;CC=US&amp;NR=11158551B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20211026&amp;DB=EPODOC&amp;CC=US&amp;NR=11158551B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Barclay, Duncan</creatorcontrib><creatorcontrib>Horsburgh, Edward</creatorcontrib><creatorcontrib>Belonio, Jr., Jesus Mennen</creatorcontrib><title>Modular WLCSP die daisy chain design for multiple die sizes</title><description>A method to fabricate a modular die daisy chain design for wafer level chip scale package (WLCSP) board level reliability testing is described. A wafer is provided having pairs of solder balls electrically connected to each other by underlying metal pads. The wafer is singulated into dies of any of a plurality of sizes as required for testing. Thereafter one of the singulated dies is mounted to a test printed circuit board (PCB). The pairs of solder balls are electrically connected in a daisy chain on the test PCB.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLD2zU8pzUksUgj3cQ4OUEjJTFVIScwsrlRIzkjMzFNISS3OTM9TSMsvUsgtzSnJLMhJBaspzqxKLeZhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfGhwYaGhqYWpqaGTkbGxKgBADiaLqU</recordid><startdate>20211026</startdate><enddate>20211026</enddate><creator>Barclay, Duncan</creator><creator>Horsburgh, Edward</creator><creator>Belonio, Jr., Jesus Mennen</creator><scope>EVB</scope></search><sort><creationdate>20211026</creationdate><title>Modular WLCSP die daisy chain design for multiple die sizes</title><author>Barclay, Duncan ; Horsburgh, Edward ; Belonio, Jr., Jesus Mennen</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11158551B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2021</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Barclay, Duncan</creatorcontrib><creatorcontrib>Horsburgh, Edward</creatorcontrib><creatorcontrib>Belonio, Jr., Jesus Mennen</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Barclay, Duncan</au><au>Horsburgh, Edward</au><au>Belonio, Jr., Jesus Mennen</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Modular WLCSP die daisy chain design for multiple die sizes</title><date>2021-10-26</date><risdate>2021</risdate><abstract>A method to fabricate a modular die daisy chain design for wafer level chip scale package (WLCSP) board level reliability testing is described. A wafer is provided having pairs of solder balls electrically connected to each other by underlying metal pads. The wafer is singulated into dies of any of a plurality of sizes as required for testing. Thereafter one of the singulated dies is mounted to a test printed circuit board (PCB). The pairs of solder balls are electrically connected in a daisy chain on the test PCB.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
SEMICONDUCTOR DEVICES
title Modular WLCSP die daisy chain design for multiple die sizes
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-05T12%3A06%3A11IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Barclay,%20Duncan&rft.date=2021-10-26&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11158551B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true