Gate-lifted NMOS ESD protection device

An ESD protection device including a PNP transistor connected to an input pad, a diode connected to the PNP transistor and connected to an output pad, and an NMOS transistor connected to the PNP transistor and the output pad, wherein the diode, PNP transistor, and NMOS transistor are configured to r...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Lai, Da-Wei, Peters, Wilhelmus Cornelis Maria, Sque, Stephen John
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:An ESD protection device including a PNP transistor connected to an input pad, a diode connected to the PNP transistor and connected to an output pad, and an NMOS transistor connected to the PNP transistor and the output pad, wherein the diode, PNP transistor, and NMOS transistor are configured to route different levels of an electrostatic discharge (ESD) current pulse from the input pad to the output pad.