Apparatus and method for clearing memory content

Aspects of the present disclosure relate to systems and methods for issuing and executing a clear content command within a memory. Certain embodiments provide a method for the memory to receive a clear content command configured to clear content stored on the memory in a first set of memory cells of the plurality of memory cells of the plurality of memory banks. Certain embodiments provide a method of implementing within a DRAM memory the clear command by reusing existing refresh mechanism with minimal or no additional transistors or other hardware within the sense amplifier circuitry of the memory.