Memory controller for concurrently writing host data and garbage collected data and operating method thereof
In a memory controller for controlling an operation of a memory device, the memory controller includes a buffer memory and a processor. The buffer memory stores first data received from a host and second data received from the memory device. The processor controls the memory controller to generate a...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | In a memory controller for controlling an operation of a memory device, the memory controller includes a buffer memory and a processor. The buffer memory stores first data received from a host and second data received from the memory device. The processor controls the memory controller to generate a write command for programming the first data and the second data to the memory device. |
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