Method to mitigate signal feed through ESD elements
An integrated circuit (IC) die is provided, which includes a die body; electrostatic discharge (ESD) circuitry formed in the die body; contact pads exposed on an active side of the die body; a first conductive tower formed in the die body and electrically coupling a first contact pad to the ESD circ...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | An integrated circuit (IC) die is provided, which includes a die body; electrostatic discharge (ESD) circuitry formed in the die body; contact pads exposed on an active side of the die body; a first conductive tower formed in the die body and electrically coupling a first contact pad to the ESD circuitry. The first conductive tower comprises first, second, third, and fourth segments formed from metal layers of the die body; a first via electrically coupling the first segment to the second segment; a second via electrically coupling the first segment to the third segment; a third via electrically coupling the second segment to the fourth segment; and a fourth via electrically coupling the third segment to the fourth segment, the second segment electrically parallel with the third segment. The IC die further comprises at least a first data line disposed between the first, second, third, and fourth segments. |
---|