Inspection system, wafer map display, wafer map display method, and computer program

An inspection system is provided with a prober and a tester. The tester includes a plurality of tester module boards on which a plurality of LSIs respectively corresponding to a plurality of devices under test (DUT) are mounted; a display unit which displays a wafer map indicating inspection results of the plurality of DUTs and/or self-diagnosis results of the tester; and a tester control unit which includes a wafer map drawing application for drawing the wafer map displayed on the display unit. The wafer map drawing application causes the inspection results and/or the self-diagnosis results to be displayed for each of the plurality of DUTs in a stepwise manner. In the wafer map, the plurality of DUTs are respectively linked to correspond to the plurality of LSIs mounted on the plurality of tester module boards.