Wafer placement error detection based on measuring a current through an electrostatic chuck and solution for intervention

Methods and systems of detection of wafer placement error in a semiconductor processing chamber are disclosed. Methods and systems of interdiction are also disclosed to prevent hardware and wafer damage during semiconductor fabrication if and when a wafer placement error is detected. The method-is based on measuring a slope of current in an electrostatic chuck (ESC), which is correlated to lack of contact between the wafer and the ESC. Wafer placement detection at an early stage, when a heater and an ESC are being set up, gives the option of stopping the process before high power RF plasma is created.