Storage unit and static random access memory

A storage unit and a static random access memory (SRAM), where storage unit includes a latch, and the latch provides a first storage bit. The storage unit further includes a first metal-oxide-semiconductor (MOS) transistor. A gate of the first MOS transistor is coupled to the first storage bit, a source of the first MOS transistor is coupled to a first read line, and a drain of the first MOS transistor is coupled to a second read line. In a first state, the first read line is a read word line, and the second read line is a read bit line, or in a second state, the second read line is a read word line, and the first read line is a read bit line. The storage unit according to embodiments of the present invention can implement an exchange between a read word line and a read bit line.