Retention voltage generator circuit

Memory circuits used in computer systems may have different operating modes. In a retention mode, a voltage level of an array power supply node coupled to memory cells included in the memory circuit is reduced to a level sufficient to retain data, but not to perform read and write operations to the...

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Bibliographische Detailangaben
Hauptverfasser: Li, Jiangyi, Abu-Rahma, Mohamed H, Lim, Jaemyung, Nazar, Shahzad, Raszka, Jaroslav
Format: Patent
Sprache:eng
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Zusammenfassung:Memory circuits used in computer systems may have different operating modes. In a retention mode, a voltage level of an array power supply node coupled to memory cells included in the memory circuit is reduced to a level sufficient to retain data, but not to perform read and write operations to the memory cells. A power converter circuit may be configured to generate the retention voltage level, and adjust the retention voltage level using a leakage current of dummy memory cells included in the memory circuit.