Method, system and device for integration of bitcells in a volatile memory array and bitcells in a non-volatile memory array

Method, system and device for integration of bitcells in a volatile memory array and bitcells in a non-volatile memory array

Disclosed are methods, systems and devices for operation of memory device. In one aspect, volatile memory bitcells and non-volatile memory bitcells may be integrated to facilitate copying of memory states between the volatile and non-volatile memory bitcells.

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Bibliographische Detailangaben
Hauptverfasser: Lattimore, George McNeil, Bhargava, Mudit, Cline, Brian Tracy, Das, Shidhartha
Format: Patent
Sprache:eng
Schlagworte:
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Beschreibung
Zusammenfassung:Disclosed are methods, systems and devices for operation of memory device. In one aspect, volatile memory bitcells and non-volatile memory bitcells may be integrated to facilitate copying of memory states between the volatile and non-volatile memory bitcells.