Multichip package link

Multichip package link

Physical layer logic is provided that is to receive data on one or more data lanes of a physical link, receive a valid signal on another of the lanes of the physical link identifying that valid data is to follow assertion of the valid signal on the one or more data lanes, and receive a stream signal...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Ayyasamy, Ananthan, Pasdast, Gerald S, Safranek, Robert J, Li, Xiaobel, Wu, Zuoguo, Das Sharma, Debendra, Blankenship, Robert G, Wagh, Mahesh
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:Physical layer logic is provided that is to receive data on one or more data lanes of a physical link, receive a valid signal on another of the lanes of the physical link identifying that valid data is to follow assertion of the valid signal on the one or more data lanes, and receive a stream signal on another of the lanes of the physical link identifying a type of the data on the one or more data lanes.