Semiconductor encapsulation structure
Provided is a semiconductor encapsulation structure, including: a device base (1) and a cover plate (2). The device base is provided with a cavity (11) for accommodating a chip (3). The device base is further provided with a cover-plate sintered layer (12). The cover-plate sintered layer is metalliz...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | Provided is a semiconductor encapsulation structure, including: a device base (1) and a cover plate (2). The device base is provided with a cavity (11) for accommodating a chip (3). The device base is further provided with a cover-plate sintered layer (12). The cover-plate sintered layer is metallized. The cover plate matches the device base. The cover plate is provided with a base sintered layer (22). The base sintered layer is also metallized. The cover plate is connected to the base by sintering. The cover plate is connected to the base by sintering, so that low-temperature connection is achieved, thereby avoiding damage to the chip and electronic components in the base caused by high connection temperature. Furthermore, encapsulating costs are greatly reduced while ensuring connection reliability. |
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