Supporting secure memory intent

A processor for supporting secure memory intent is disclosed. The processor of the disclosure includes a memory execution unit to access memory and a processor core coupled to the memory execution unit. The processor core is to receive a request to access a convertible page of the memory. In respons...

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Bibliographische Detailangaben
Hauptverfasser:	Neiger, Gilbert, Johnson, Simon P, Santoni, Amy L, Anati, Ittai, Goldsmith, Michael, Smith, Wesley H, Makaram, Raghunandan, Zmudzinski, Krystof C, Rozas, Carlos V, Chhabra, Siddhartha, McKeen, Francis X, Scarlata, Vincent R, Shanbhogue, Vedvyas, Savagaonkar, Uday R, Alexandrovich, Ilya, Leslie-Hurd, Rebekah M
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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Beschreibung
Zusammenfassung:	A processor for supporting secure memory intent is disclosed. The processor of the disclosure includes a memory execution unit to access memory and a processor core coupled to the memory execution unit. The processor core is to receive a request to access a convertible page of the memory. In response to the request, the processor core to determine an intent for the convertible page in view of a page table entry (PTE) corresponding to the convertible page. The intent indicates whether the convertible page is to be accessed as at least one of a secure page or a non-secure page.