Asymmetric gate spacer formation using multiple ion implants

Disclosed are methods for forming a semiconductor device. In some embodiments, a method may include providing a gate structure atop a substrate, providing a gate spacer along a sidewall of the gate structure, and performing a first ion implant to the gate structure and the gate spacer, the first ion implant comprising a thermal implant disposed at a first non-zero angle of inclination with respect to a perpendicular to a plane of the substrate. The method may further include performing a second ion implant to the gate structure and the gate spacer, the second ion implant including a room-temperature ion implant disposed at a second non-zero angle of inclination with respect to the perpendicular to the plane of the substrate, and etching the gate structure and the gate spacer to remove just the second section of the gate spacer.