Semiconductor memory device

According to one embodiment, a semiconductor memory device includes: a memory cell array including a first memory cell, a first word line, a first circuit coupled to the first word line, a first driver used for a write operation and a read operation, a second driver used for an erase operation, and a voltage generator. The first circuit includes: a second circuit capable of electrically coupling the first word line and a first interconnect; a third circuit capable of electrically coupling the first interconnect and a second interconnect; a fourth circuit capable of electrically coupling the second interconnect and the first driver in the write and read operations; and a fifth circuit capable of electrically coupling the second interconnect and the second driver in the erase operation.