NAND field use erase plus defect detections
A method for detecting defects in a memory system includes receiving a command to perform a standard erase operation on at least one memory cell of the memory system. The method also includes performing a first defect detection operation on the at least one memory cell. The method also includes sett...
Gespeichert in:
| Hauptverfasser: | , , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | Rajagiri, Avinash Liao, Dongxiang Peesari, Srikar Linnen, Daniel Krishnamoorthy, Yuvaraj Ghai, Ashish |
| description | A method for detecting defects in a memory system includes receiving a command to perform a standard erase operation on at least one memory cell of the memory system. The method also includes performing a first defect detection operation on the at least one memory cell. The method also includes setting, in response to the first defect detection operation detecting a defect, a defect status indicator. The method also includes performing the standard erase operation on the at least one memory cell. The method also includes performing a second defect detection operation on the at least one memory cell. The method also includes setting, in response to the second defect detection operation detecting a defect, the defect status indicator. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US10886002B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US10886002B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US10886002B13</originalsourceid><addsrcrecordid>eNrjZND2c_RzUUjLTM1JUSgtTlVILUoEkgU5pcUKKalpqcklQKoESGXm5xXzMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjU4oLE5NS81JL40GBDAwsLMwMDIydDY2LUAAAKLCjZ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>NAND field use erase plus defect detections</title><source>esp@cenet</source><creator>Rajagiri, Avinash ; Liao, Dongxiang ; Peesari, Srikar ; Linnen, Daniel ; Krishnamoorthy, Yuvaraj ; Ghai, Ashish</creator><creatorcontrib>Rajagiri, Avinash ; Liao, Dongxiang ; Peesari, Srikar ; Linnen, Daniel ; Krishnamoorthy, Yuvaraj ; Ghai, Ashish</creatorcontrib><description>A method for detecting defects in a memory system includes receiving a command to perform a standard erase operation on at least one memory cell of the memory system. The method also includes performing a first defect detection operation on the at least one memory cell. The method also includes setting, in response to the first defect detection operation detecting a defect, a defect status indicator. The method also includes performing the standard erase operation on the at least one memory cell. The method also includes performing a second defect detection operation on the at least one memory cell. The method also includes setting, in response to the second defect detection operation detecting a defect, the defect status indicator.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210105&DB=EPODOC&CC=US&NR=10886002B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210105&DB=EPODOC&CC=US&NR=10886002B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Rajagiri, Avinash</creatorcontrib><creatorcontrib>Liao, Dongxiang</creatorcontrib><creatorcontrib>Peesari, Srikar</creatorcontrib><creatorcontrib>Linnen, Daniel</creatorcontrib><creatorcontrib>Krishnamoorthy, Yuvaraj</creatorcontrib><creatorcontrib>Ghai, Ashish</creatorcontrib><title>NAND field use erase plus defect detections</title><description>A method for detecting defects in a memory system includes receiving a command to perform a standard erase operation on at least one memory cell of the memory system. The method also includes performing a first defect detection operation on the at least one memory cell. The method also includes setting, in response to the first defect detection operation detecting a defect, a defect status indicator. The method also includes performing the standard erase operation on the at least one memory cell. The method also includes performing a second defect detection operation on the at least one memory cell. The method also includes setting, in response to the second defect detection operation detecting a defect, the defect status indicator.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZND2c_RzUUjLTM1JUSgtTlVILUoEkgU5pcUKKalpqcklQKoESGXm5xXzMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjU4oLE5NS81JL40GBDAwsLMwMDIydDY2LUAAAKLCjZ</recordid><startdate>20210105</startdate><enddate>20210105</enddate><creator>Rajagiri, Avinash</creator><creator>Liao, Dongxiang</creator><creator>Peesari, Srikar</creator><creator>Linnen, Daniel</creator><creator>Krishnamoorthy, Yuvaraj</creator><creator>Ghai, Ashish</creator><scope>EVB</scope></search><sort><creationdate>20210105</creationdate><title>NAND field use erase plus defect detections</title><author>Rajagiri, Avinash ; Liao, Dongxiang ; Peesari, Srikar ; Linnen, Daniel ; Krishnamoorthy, Yuvaraj ; Ghai, Ashish</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US10886002B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2021</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>Rajagiri, Avinash</creatorcontrib><creatorcontrib>Liao, Dongxiang</creatorcontrib><creatorcontrib>Peesari, Srikar</creatorcontrib><creatorcontrib>Linnen, Daniel</creatorcontrib><creatorcontrib>Krishnamoorthy, Yuvaraj</creatorcontrib><creatorcontrib>Ghai, Ashish</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Rajagiri, Avinash</au><au>Liao, Dongxiang</au><au>Peesari, Srikar</au><au>Linnen, Daniel</au><au>Krishnamoorthy, Yuvaraj</au><au>Ghai, Ashish</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>NAND field use erase plus defect detections</title><date>2021-01-05</date><risdate>2021</risdate><abstract>A method for detecting defects in a memory system includes receiving a command to perform a standard erase operation on at least one memory cell of the memory system. The method also includes performing a first defect detection operation on the at least one memory cell. The method also includes setting, in response to the first defect detection operation detecting a defect, a defect status indicator. The method also includes performing the standard erase operation on the at least one memory cell. The method also includes performing a second defect detection operation on the at least one memory cell. The method also includes setting, in response to the second defect detection operation detecting a defect, the defect status indicator.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US10886002B1 |
| source | esp@cenet |
| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES |
| title | NAND field use erase plus defect detections |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-12T05%3A27%3A51IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Rajagiri,%20Avinash&rft.date=2021-01-05&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS10886002B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |