Low-power fast-setting delay circuit

In certain aspects, a delay circuit includes a delay line including a bias input. The delay circuit also includes a bias generator including a clock input, and a bias output, wherein the bias output of the bias generator is coupled to the bias input of the delay line. The delay circuit further inclu...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Shing, George, Fertsch, Michael
Format: Patent
Sprache:eng
Schlagworte:
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