Method for making a semiconductor device including enhanced contact structures having a superlattice

A method for making a semiconductor device may include forming a trench in a semiconductor substrate, and forming a superlattice liner covering bottom and sidewall portions of the trench. The superlattice liner may include a plurality of stacked groups of layers, with each group of layers including...

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Bibliographische Detailangaben
Hauptverfasser: Choutov, Dmitri, Mears, Robert J, Stephenson, Robert John, Trautmann, Erwin, Connelly, Daniel, Burton, Richard, Cody, Nyles Wynn
Format: Patent
Sprache:eng
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Zusammenfassung:A method for making a semiconductor device may include forming a trench in a semiconductor substrate, and forming a superlattice liner covering bottom and sidewall portions of the trench. The superlattice liner may include a plurality of stacked groups of layers, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include forming a semiconductor cap layer on the superlattice liner and having a dopant constrained therein by the superlattice liner, and forming a conductive body within the trench.