Memory device performing data comparison write and memory system including the same

A memory device includes a memory cell array including a plurality of memory cells and a control logic to control a write operation on the memory cell array. When operating in a first data comparison write (DCW) mode, data is written to first memory cells in which data values are changed, in a first region, data is written to second memory cells in which data values are not changed, and, in a second region, data write is skipped for second memory cells in which data values are not changed.