Method and system for latch-up prevention

An integrated circuit design method includes receiving an integrated circuit design, and determining a floor plan for the integrated circuit design. The floor plan includes an arrangement of a plurality of functional cells and a plurality of tap cells. Potential latchup locations in the floor plan a...

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Bibliographische Detailangaben
Hauptverfasser: Chen, Wen-Hao, Scott, David Barry, Chen, Kuo-Ji, Ying, Shu-Yi, Islam, Rabiul, Lin, Wun-Jie, Su, Yu-Ti, Lai, Po-Chia, Rusu, Stefan, Li, Kuan-Te
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:An integrated circuit design method includes receiving an integrated circuit design, and determining a floor plan for the integrated circuit design. The floor plan includes an arrangement of a plurality of functional cells and a plurality of tap cells. Potential latchup locations in the floor plan are determined, and the arrangement of at least one of the functional cells or the tap cells is modified based on the determined potential latchup locations.