Data processing engine arrangement in a device

Data processing engine arrangement in a device

A device may include a plurality of data processing engines. Each of the data processing engines may include a core and a memory module. The plurality of data processing engines may be organized in a plurality of rows. Each core may be configured to communicate with other neighboring data processing...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Tuan, Tim, Bilski, Goran H K, Vissers, Kornelis A, Langer, Jan, Ozgul, Baris, Walke, Richard L, Clarke, David, Noguera Serra, Juan J, Wittig, Ralph D
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:A device may include a plurality of data processing engines. Each of the data processing engines may include a core and a memory module. The plurality of data processing engines may be organized in a plurality of rows. Each core may be configured to communicate with other neighboring data processing engines of the plurality of data processing engines by shared access to the memory modules of the neighboring data processing engines.