Pattern fidelity enhancement

The present disclosure provides a method for semiconductor manufacturing in accordance with some embodiments. The method includes providing a substrate and a patterning layer over the substrate, wherein the substrate includes a plurality of features to receive a treatment process; forming at least o...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Chang, Ya Hui, Wu, Wei-Hao, Lin, Wei-Liang, Yen, Yung-Sung, Shen, Yu-Tien, Liu, Ru-Gun, Chen, Kuei-Shun, Yeh, Ya-Wen, Lin, Li-Te
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:The present disclosure provides a method for semiconductor manufacturing in accordance with some embodiments. The method includes providing a substrate and a patterning layer over the substrate, wherein the substrate includes a plurality of features to receive a treatment process; forming at least one opening in the patterning layer, wherein the plurality of features is partially exposed in the at least one opening; applying a directional etching to expand the at least one opening in a first direction, thereby forming at least one expanded opening; and performing the treatment process to the plurality of features through the at least one expanded opening.