Semiconductor package having mark with identification information

A semiconductor package includes: a connection member having a first surface and a second surface opposing each other, and including a first redistribution layer; a semiconductor chip disposed on the first surface of the connection member and having connection pads connected to the first redistribution layer; an encapsulant disposed on the first surface of the connection member and encapsulating the semiconductor chip; a wiring structure connected to the first redistribution layer and extending in a thickness direction of the encapsulant; a second redistribution layer disposed on the encapsulant and connected to the wiring structure; and a mark disposed on the encapsulant and including a plurality of metal patterns providing identification information and a circuit line connected to the second redistribution layer.