Semiconductor package

A semiconductor package includes a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposing the active surface; a first encapsulant covering at least a portion of each of the inactive surface and side surfaces of the semiconductor chip, and having one or more recessed portions recessed towards the inactive surface of the semiconductor chip; a metal layer disposed on the first encapsulant, and filling at least a portion of each of the recessed portions; and an interconnect structure disposed on the active surface of the semiconductor chip, and including a redistribution layer electrically connected to the connection pad. A surface of the metal layer in contact with the first encapsulant has a surface roughness greater than a surface roughness of a surface of the metal layer spaced apart from the first encapsulant.