Balancer for multiple field effect transistors arranged in a parallel configuration

Balancer for multiple field effect transistors arranged in a parallel configuration

In at least one general aspect, an apparatus can include a first field effect transistor (FET) device and a second FET device. The apparatus can include a characterization circuit coupled to the first FET device and the second FET device where the characterization circuit can be configured to charac...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Mitter, Chang Su, Mikolajczak, Adrian
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
GENERATION OF NOISE BY SUCH CIRCUITS
GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING,BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN ANON-SWITCHING MANNER
PULSE TECHNIQUE
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:In at least one general aspect, an apparatus can include a first field effect transistor (FET) device and a second FET device. The apparatus can include a characterization circuit coupled to the first FET device and the second FET device where the characterization circuit can be configured to characterize a responsiveness of each of the first FET device and the second FET device. The apparatus can include a balancer configured to produce a modified gate drive signal for the first FET device based on the responsiveness of the first FET device.