Electronic circuit configured to adjust sampling timing for recovering data

An electronic circuit includes a clock recovery circuit that generates a first reference clock signal based on first reception data and generates a second reference clock signal based on second reception data received after the first reception, a sampling clock generator that generates a sampling cl...

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Bibliographische Detailangaben
Hauptverfasser: Ryu, Kyungho, Pae, Hansu, Lim, Hyunwook, Lee, Kilhoon, Lee, Jaeyoul, Lim, Jung-Pil
Format: Patent
Sprache:eng
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Zusammenfassung:An electronic circuit includes a clock recovery circuit that generates a first reference clock signal based on first reception data and generates a second reference clock signal based on second reception data received after the first reception, a sampling clock generator that generates a sampling clock signal having a phase based on a phase difference between the first reference clock signal and the second reference clock signal, and a sampler that recovers the second reception data based on the generated sampling clock signal.