Reference buffer with integration path, on-chip capacitor, and gain stage separate from the integration path

A system includes: a reference buffer coupled to an input supply voltage; an analog-to-digital converter (ADC) coupled to an output of the reference buffer; and an output capacitor coupled between the output of the reference buffer and a ground node. The reference buffer includes: an integrator; an internal capacitor coupled between an output of the integrator and the ground node; a first gain stage with an input coupled to the output of the reference buffer; and a second gain stage with an input coupled to the output of the integrator. The output of the first gain stage is combined with the output of the integrator using a combine circuit.