System interconnect and system on chip having the same

A system on chip (SoC) includes a bus matrix configured to connect a plurality of functional blocks. A monitoring unit is configured to monitor whether a transaction between the functional blocks has a hang or stall and distinguish a functional block that caused a hang or stall from among the functi...

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Bibliographische Detailangaben
Hauptverfasser: Ryu, Sueng-Chul, Seo, Bo-Eok
Format: Patent
Sprache:eng
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Zusammenfassung:A system on chip (SoC) includes a bus matrix configured to connect a plurality of functional blocks. A monitoring unit is configured to monitor whether a transaction between the functional blocks has a hang or stall and distinguish a functional block that caused a hang or stall from among the functional blocks. A recovery signal generation unit is configured to provide a recovery signal for releasing the hang or stall to at least one of the functional blocks based on the distinguishing by the monitoring unit.